ASIM team
LIP6 Laboratory
Paris, France
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Internal serial loop back

In this next step, a serial loop back mechanism is activated in each HSL in order to connect internally its serial output with its serial input. In a similar way, data are sent into R3P by the parallel port 0, the routing tables are loaded so that the data follow the path running through SMI1/HSL1, SMI2/HSL2, ...., SMI7/HSL7 to be finally available on the parallel output of port 0.
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Next: External serial loop back Up: Functional test Previous: Internal parallel loop back

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