ASIM team
LIP6 Laboratory
Paris, France

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Overview

PCI-DDC has 92 logic pins and 28 supply pins in a Quad flat Pack (QFP) 120 pins package.

  
Figure: PCI-DDC pin overview
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\center\leavevmode
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The signal electric type are those defined in PCI specification 2.1 page 8, that are:
\begin{mydescription}
\item[IN]
 \id{Input} : standard input signal.
\item[OUT]
...
 ...There is a central weak-pullup to sustain the inactive state.\end{mydescription}
Note that the active low-signal names are suffixed with the _N chars, rather than the # char (PCI specification) because the # char is not allowed by our modeling language (VHDL). Assert a signal means drive the active state, that is 0 for an _N suffixed signal else 1. The following table gives a signal overview. Signals are detailed in sections below.
  =4.5pt
 
Table: PCI-DDC pin list
AD (31 downto 0) TS Address and Data (multiplexed on PCI bus) p. [*]
CBE_N (3 downto 0) TS Commands and Byte Enables  
PAR TS Even PARity on AD and CBE_N  
IDSEL IN Initialization Device SELect used to configure PCI-DDC p. [*]
REQ_N TS PCI-DDC REQuest to the bus arbiter  
GNT_N IN GraNT signal from the bus arbiter  
DEVSEL_N STS PCI DEVice (memory) SELect  
FRAME_N STS indicate the beginning and duration of a PCI access  
IRDY_N STS PCI Initiator ReaDY  
TRDY_N STS PCI Target ReaDY  
STOP_N STS current PCI target STOP request  
CLK IN 33Mhz PCI clock p. [*]
RST_N IN PCI reset signal  
PERR_N STS PCI data Parity ERRor report  
SERR_N STS PCI address and System ERRor report  
INTA_N OD PCI interrupt signal  
HSLCLK IN 80Mhz RCUBE clock p. [*]
ASKTX IN flux control: network asks for data from PCI-DDC  
STROBETX_N OUT transmitted data strobe  
DATATX (8 downto 0) OUT transmitted data to the network  
ASKRX OUT flux control: PCI-DCC asks for data from the network  
VALIDRX IN received data validity signal  
DATARX (8 downto 0) IN received data from the network  
R3RST_N OUT RCUBE reset signal p. [*]
R3STATUS(7 downto 0) IN RCUBE link status  
R3STROBE OUT RCUBE configuration data strobe  
R3DOUT(7 downto 0) OUT RCUBE configuration data  
TEST IN Test mode p. [*]
VDD IN Power (+5v) p. [*]
VSS IN Ground (0v)  
       


next up previous contents
Next: PCI Address and Data Up: PCI-DDC pins Previous: PCI-DDC pins

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