ASIM team
LIP6 Laboratory
Paris, France

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PCI Address and Data bus  


\begin{mydescription}
\item[AD~(31 downto 0)]\makebox[1.5cm][l]{\bf TS} \makebox...
 ...}

 Parity. AD, CBE\_N et PAR must have a even number of one.\end{mydescription}


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Next: PCI control signals Up: PCI-DDC pins Previous: Overview

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