System Boot and Debug

ASIM team
LIP6 Laboratory
Paris, France

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System Boot and Debug

A switch on the SmartHSL board determines whether the DSP should boot from its flash ROM or from the PCI bus. Utilities are provided under FreeBSD to upload a bootstrap code, and to flash a new bootstrap in the flash.

The DSP provides an on-chip RS-232 interface, which is exported to a miniDIN connector. A text terminal can thus be connected as a console of the subsystem, for debug and monitoring purposes.

Two others low speed serial links are also provided on the card, through RJ11 connectors. These links can be daisy-chained and used for configuration and remote systems (such as external routers) control.

Finally, the DSP has got a JTAG port accessible via an on board connector. This port can be used to connect an external probe or emulator to debug DSP firmware. It supports the JTAG and OnCE (On Chip Emulator) protocols.

Next: SmartHSL Architecture and Expected Up: SmartHSL Features Previous: System Environment