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LIP6 Laboratory
Paris, France

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Device Requirement  


\begin{mydescription}
\item[Maximum Latency]
 The transfer throughput regularity...
 ... Line]
 This 8-bit R/W register is reserved for software use.\end{mydescription}

8(R) Max Latency8(R) Min Grant 8 (R) Interrupt Pin (INTA)8(R/W) Interrupt Line&
&&&&&&& &&&&&&& &&&&&&& &&&&&&& &
§-19.5pt &&&&&&& &&&&&&& &&&&&&& &&&&&&& &
3Ch 800h 800h 801h 800h&
&31&&&&&&&24& 23&&&&&&&16& 15&&&&&&&8& 7&&&&&&&0&
Device Requirement


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Next: PCI-DDC Status Register Up: Configuration registers Previous: Miscellaneous Functions

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