The ``remote write'' primitive

ASIM team
LIP6 Laboratory
Paris, France

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From the hardware point of view, a message transmission procedure consists of three stages: preparation, transmission and reception (see Fig 2).

**Figure 2:** Standard transaction steps
$\begin{figure} \center\leavevmode \psfig {file=trans_ar.eps,width=.75\textwidth}\end{figure}$

Preparation:: (1) Page Descriptors are pushed by software into the LPE. Then (2), the software informs the PCI-DDC component of the LPE modification by writing in a PCI-DDC configuration register.
Transmission:: (3) The sending PCI-DDC asks for the PCI-bus and reads the LPE descriptor using DMA accesses. Then (4), it performs data transmission, always using DMA accesses. There is no overhead for the processor during transmission. The physical remote address is transmitted with every packet. When the last page is sent, PCI-DDC can notify the sending processor with an interrupt signal (IT1).
Reception:: (5) At the receiving side, as soon as PCI-DDC begins to receive packets, it asks for the PCI-bus and writes data at the specified address into the main memory using DMA accesses. (6) In case of adaptive networks, PCI-DDC uses the LRM in order to count received packets. There is no overhead for the processor during reception. (7) When the last packet is written, PCI-DDC can notify the processor, either with an interrupt signal (IT2), and/or by writing the LMI.

Next: Message types Up: Functional Description Previous: The ``Direct Deposit'' protocol