ASIM team
LIP6 Laboratory Paris, France |
16 16(W) Soft Reset
16 15(R/W) Tx Init
16(R/W) Transmit/Receive Balance 14(R/W) R3 Init
15 13(R/W) Rx Init
&&&12(R/W) Maximum Packet Length &&10(R/W) LRM Enable
&&&11 &&9(R/W) Digital Loopback
&&&11 &&
§-19.5pt
&&&11 &&
48h
48120h101010102Res10108Reserved
&31&&&28&27&&&&&&&&&&&16&15&14&13&12&&&9&8&7&&&&&&&0&
PCI-DDC Command Register
Server design A. Fenyö
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