MPC : A low-cost parallel multiprocessor
using a 1 Gbit/s communication network

A. Bouaraoua, J.L. Desbarbieux, A. Fenyö, A. Greiner, J.J. Lecler, F. Potter, V. Reibaldi, F. Silva,
C. Spasevski, F. Wajsbürt, B. Zerrouk, A. Zerrouki.

University Pierre et Marie Curie - LIP6 - ASIM
Contact us at http://www-asim.lip6.fr/mpc/index.fr.html

The MPC project started in 1995 at University Pierre et Marie Curie (LIP6).

Project goal : The project goal is to design a high performance/low cost multiprocessor, using standard Pentium based PC-boards as nodes, Unix FreeBSD operating system, and a high speed communication network built on the gigabit-HSL (High Speed Link) IEEE-1355 technology.

Hardware components : The high speed network is based on the RCube dynamic router, developed at UPMC/LIP6. RCube is a VLSI circuit implementing a 8x8 crossbar with interval labeling and wormhole routing. Each processor node is connected to a router by means of another dedicated chip, PCI-DDC, implementing a Direct Deposit Protocol to provide inter-node DMA throw the PCI bus.

Software components : A stack of kernel protocols and monitoring daemons has been developed in cooperation with PRiSM and ENST laboratories, and integrated inside Unix FreeBSD to provide several communication layers for developpers. An optimized implementation of PVM on top of this stack will be available 2nd quarter 1998.

DEMONSTRATION

We demonstrate here both the first MPC computer made of 4 nodes interconnected with 1 Gbit/s HS Links, and the software communication layers. The chosen application to demonstrate the stability of hardware and software components of the MPC multi-processor machine is the multimedia distributed game `DOOM'.


Topology of the demonstrated MPC parallel machine you can see on our stand